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HMC5983
Read and Write protocol
Figure 1: Read & Write Protocol
CS (SPI_CS) is the Serial Port Enable and it is controlled by the SPI master. It goes low at the start of the transmission
and goes back high at the end. SCK (SPI_SCK) is the Serial Port Clock and it is controlled by the SPI master. It is
stopped high when CS is high (no transmission). SDI (SPI_SDI) and SDO (SPI_SDO) are respectively the Serial Port
Data Input and Output. Those lines are driven at the falling edge of SCK and should be captured at the rising edge of
SCK .
Both the Read Register and Write Register commands are completed in 16 clocks pulses or in multiple of 8 in case of
multiple byte read/write. Bit duration is the time between two falling edges of SCK . The first bit (bit 0) starts at the first
falling edge of SCK after the falling edge of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SCK
(SPI_CS) just before the rising edge of CS .
bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0) from the device is read. In
latter case, the chip will drive SDO at the start of bit 8.
bit 1: MS bit. When 0, the address will remain unchanged in multiple read/write commands. When 1, the address will be
auto incremented in multiple read/write commands.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that will be written into the device (MSb first).
bit 8-15: data DO(7:0) (read mode). This is the data that will be read from the device (MSb first).
In multiple read/write commands further blocks of 8 clock periods will be added. When MS bit is 0 the address used to
read/write data remains the same for every block. When MS bit is 1 the address used to read/write data is incremented at
every block.
The function and the behavior of SDI and SDO remain unchanged.
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